This device is a 74HC595 Shift Register Breakout CJMCU-595 8 bit shift register.
Description:
- The 74HC595 contains an 8-bit serial-in, a parallel-out shift register that provides data to an 8-bit D-type memory register.
- The 74HC595's memory registers have three-state outputs.
- The shift register and the memory register have separate clocks. 74HC595 shift register with the highest priority direct clear side (SRCLR), A serial input (SER), and a serial output for cascading.
- When the output enables Is high, the output of the 74HC595 will be in a high-impedance state.
- Both the shift register clock (SRCLK) and the store register clock (RCLK) are edge-triggered. If the two clocks are tied together, the shift register will stay one clock pulse ahead of the storage register.
- Operating Voltage Range:2-6V
- Low Input Current:1.0uA
- Output Drive Capability:15 LSTTL Loads
- Outputs Directly Interface to CMOS,NMOS,and TTL
- Operating Voltage Range:2.0 to 6.0 V
- Low Input Current:1.0uA
- High Noise Immunity Characteristic of CMOS Devices
- In Compliance with the Requirements Defined by JEDEC Standard No.7A
- Chip Complexity:328 FETs or 82 Equivalent Gates
- Improvements over HC595:improved propagation delays;50% lower quiescent power;improved input noise and latchup immunity
WARNING
