The CY7C185 is a high-performance CMOS static RAM organized as 8192 words by 8 bits.
Easy memory expansion isprovided by an active LOW chip enable (CE1), an active HIGHchip enable (CE2), and active LOW output enable (OE) andthree-state drivers. This device has an automatic power-downfeature (CE1 or CE2), reducing the power consumption by 70%when deselected. The CY7C185 is in a standard 300-mil-wideDIP, SOJ, or SOIC package.
An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE1 and WE inputs are both LOW and CE2 is HIGH, data on the eight datainput/output pins (I/O0 through I/O7) is written into the memorylocation addressed by the address present on the addresspins (A0 through A12). Reading the device is accomplished byselecting the device and enabling the outputs, CE1 and OEactive LOW, CE2 active HIGH, while WE remains inactive orHIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on theeight data input/output pins.
The input/output pins remain in a high-impedance state unlessthe chip is selected, outputs are enabled, and write enable(WE) is HIGH. A die coat is used to insure alpha immunity.
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