The Raspberry Pi Pico 2 is an upgraded version of the original Pico microcontroller, featuring the new RP2350 chip.
Raspberry Pi Pico 2 is the new Raspberry Pi’s low cost microcontroller board, built on RP2350: a new high-performance, secure microcontroller. With a higher core clock speed, double the on-chip SRAM, double the on-board flash memory, more powerful Arm cores, optional RISC-V cores, new security features, and upgraded interfacing capabilities, Raspberry Pi Pico 2 delivers a significant performance and feature boost while retaining hardware and software compatibility with earlier members of the Raspberry Pi Pico series.
RP2350 provides a comprehensive security architecture, built around Arm TrustZone for Cortex-M, and incorporating signed boot, 8KB of anti-fuse OTP for key storage, SHA-256 acceleration, a hardware TRNG, and fast glitch detectors. These features, including the secure boot ROM, are extensively documented and available to all users without restriction: this transparent approach, which contrasts with the “security through obscurity” offered by legacy vendors, allows professional users to integrate RP2350, and Raspberry Pi Pico 2, into products with confidence.
The unique dual-core, dual-architecture capability of RP2350 allows users to choose between a pair of industry-standard Arm Cortex-M33 cores and a pair of open-hardware Hazard3 RISC-V cores. Programmable in C / C++ and Python, and with detailed documentation, Raspberry Pi Pico 2 is the ideal microcontroller board for enthusiasts and professional developers alike.
Specifications
Dual Arm Cortex-M33 or dual Hazard3 processors @ 150MHz
520 KB on-chip SRAM
Software- and hardware-compatible with Raspberry Pi Pico 1
Drag-and-drop programming using mass storage over USB
Castellated module allows soldering direct to carrier boards
Robust and fully documented security features:
- Optional boot signing, enforced by on-chip mask ROM, with key fingerprint in OTP
- Protected OTP storage for optional boot decryption key
- Global bus filtering based on Arm or RISC-V security/privilege levels
- Peripherals, GPIOs, and DMA channels individually assignable to security domains
- Hardware mitigations for fault injection attacks
- Hardware SHA-256 accelerator
2 × UART
2 × SPI controllers
2 × I2C controllers
24 × PWM channels
4 x ADC channels
1 × USB 1.1 controller and PHY, with host and device support
12 × PIO state machines
Open source C/C++ SDK, MicroPython support
Operating temperature -20°C to +85°C
Supported input voltage 1.8–5.5V DC
Resources
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