Sipeed MAIX-I module WiFi version (1st RISC-V 64 AI Module, K210 inside)
Inherit the advantage of K210's small footprint, Sipeed MAIX-I module, or called M1, integrate K210, 3ch dcdc power, 8MB/16MB/128MB Flash (M1w module add wifi chip esp8285 on it) into Square Inch Module.
Sipeed MAix: AI at the edge
AI is pervasive today, from consumer to enterprise applications. With the explosive growth of connected devices, combined with a demand for privacy/confidentiality, low latency and bandwidth constraints, AI models trained in the cloud increasingly need to be run at the edge.
MAIX is Sipeed’s purpose-built module designed to run AI at the edge, we called it AIoT. It delivers high performance in a small physical and power footprint, enabling the deployment of high-accuracy AI at the edge, and the competitive price make it possible embed to any IoT devices. As you see, Sipeed MAIX is quite like Google edge TPU, but it act as master controller, not an accelerator like edge TPU, so it is more low cost and low power than AP+edge TPU solution.
MAix's Advantage and Usage Scenarios:
- MAIX is not only hardware, but also provide an end-to-end, hardware + software infrastructure for facilitating the deployment of customers' AI-based solutions.
- Thanks to its performance, small footprint, low power, and low cost, MAIX enables the broad deployment of high-quality AI at the edge.
- MAIX isn't just a hardware solution, it combines custom hardware, open software, and state-of-the-art AI algorithms to provide high-quality, easy to deploy AI solutions for the edge.
- MAIX can be used for a growing number of industrial use-cases such as predictive maintenance, anomaly detection, machine vision, robotics, voice recognition, and many more. It can be used in manufacturing, on-premise, healthcare, retail, smart spaces, transportation, etc.
- In hardware, MAIX have powerful KPU K210 inside, it offers many excited features:
- 1st competitive RISC-V chip, also 1st competitive AI chip, newly release in Sep. 2018
- 28nm process, dual-core RISC-V 64bit IMAFDC, on-chip huge 8MB high-speed SRAM (not for XMR :D), 400MHz frequency (able to 800MHz)
- KPU (Neural Network Processor) inside, 64 KPU which is 576bit width, support convolution kernels, any form of activation function. It offers 0.25TOPS@0.3W,400MHz, when overclock to 800MHz, it offers 0.5TOPS. It means you can do object recognition 60fps@VGA
- APU (Audio Processor) inside, support 8mics, up to 192KHz sample rate, hardcore FFT unit inside, easy to make a Mic Array (MAIX offer it too)
- Flexible FPIOA (Field Programmable IO Array), you can map 255 functions to all 48 GPIOs on the chip
- DVP camera and MCU LCD interface, you can connect an DVP camera, run your algorithm, and display on LCD
- Many other accelerators and peripherals: AES Accelerator, SHA256 Accelerator, FFT Accelerator (not APU's one), OTP, UART, WDT, IIC, SPI, I2S, TIMER, RTC, PWM, etc.
Inherit the advantage of K210's small footprint, Sipeed MAIX-I module, or called M1, integrate K210, 3-channel DC-DC power, 8MB/16MB/128MB Flash (M1w module add wifi chip esp8285 on it) into Square Inch Module. All usable IO breaks out as 1.27mm(50mil) pins, and pin's voltage is selectable from 3.3V and 1.8V.
MAIX's development board (M1 dock & M1w dock, w means WiFi version)
Firstly, We make an prototype development board for M1, called M1 dock or Dan Dock, it is simple, small, cheap, but all functions include.
As many DIYer want build their own work with breadboard, Sipeed newly provide breadboard-friendly board for you, it called MAix BiT
- It is twice of M1 size, 1x2 inch size, breadboard-friendly, and also SMT-able,
- It integrate USB2UART chip, auto download circuit, RGB LED, DVP Camera FPC connector(support small FPC camera and standard M12 camera), MCU LCD FPC connector(support our 2.4 inch QVGA LCD), TF card solt.
- MAix BiT is able to adjust core voltage! you can adjust from 0.8V~1.2V, overclock to 800MHz!
And the bigger and better MAIX's development board Sipeed MAIX Go
MAix Go is bigger and better than M1 Dock.
- It is 88x60mm, all pins out, with standard M12 lens DVP camera, and the Camera can be fliped from front to rear!
- It have on board JTAG&UART based on STM32F103C8, so you can debug M1 without extra Jlink.
- It have lithium battery manager chip with power path management function, you can use the board with lithium battery and usb power without conflict~
- It have I2S Mic, Speaker, RGB LED, Mic array connector, thumbwheel, TF card Slot and so on.
- This suit include 2.8 inch LCD too, and have an simple case for it.
MAIX's peripheral module
We have see basic camera and LCD interface on board, so DVP Camera and MCU LCD is support very early.
It support OV7725， OV2640(default, 2M)，OV5640 for the moment.And it support 2.4 inch st7789, and 2.8 inch ili9341 LCD in QVGA resolution.
We have extra tiny I2S mic module and Cool 6+1 Microphone Array Module
Sipeed 6+1 Microphone Arra is a 6 microphone expansion board for Maix AI development boards designed for AI and voice applications.
Including 6+1 digital microphones, 12 three-color LEDs, it supports sound localization, beam forming, speech recognition etc.
Next one, we have Binocular camera module!You can try binocular stereo vision with it
Sipeed Binocular camera module is a camera expansion board for Maix AI development boards designed for AI and Binocular stereo vision applications.
It supports Binocular stereo vision and depth vision. The camera(OV2640 or OV7725) and I2S mic are optional.
MAIX support original standalone SDK, FreeRTOS SDK base on C/C++.
And we port micropython on it: http://en.maixpy.sipeed.com/. It support FPIOA, GPIO, TIMER, PWM, Flash, OV2640, LCD, etc. And it have zmodem, vi, SPIFFS on it, you can edit python directly or sz/rz file to board. We are glad to see you contribute for it:
https://github.com/sipeed/MaixPy //Maixpy project
https://github.com/sipeed/MaixPy_Doc_Us_En_Backup //Maixpy wiki project
MAix's Deep learning
MAIX support fixed-point model that the mainstream training framework trains, according to specific restriction rules, and have model compiler to compile models to its own model format.
It support tiny-yolo, mobilenet-v1, and, TensorFlow Lite! Many TensorFlow Lite model can be compiled and run on MAIX!
|CPU : RISC-V Dual Core 64bit, 400Mh adjustable||Powerful dual-core 64-bit open architecture-based
processor with rich community resources
|FPU Specifications||IEEE754-2008 compliant high-performance pipelined FPU|
|Debugging Support||High-speed UART and JTAG interface for debugging|
|Neural Network Processor (KPU)||• Supports the fixed-point model that the mainstream training framework trains according to specific restriction rules
• There is no direct limit on the number of network layers, and each layer of convolutional neural network parameters can be configured separately, includ- ing the number of input and output channels, and the input and output line width and column height
• Support for 1x1 and 3x3 convolution kernels
• Support for any form of activation function
• The maximum supported neural network parameter size for real-time work is 5MiB to 5.9MiB
• The maximum supported network parameter size when
working in non-real time is (flash size - software size)
|Audio Processor (APU)||• Up to 8 channels of audio input data, ie 4 stereo channels
• Simultaneous scanning pre-processing and beamforming for sound sources in up to 16 directions
• Supports one active voice stream output
• 16-bit wide internal audio signal processing
• Support for 12-bit, 16-bit, 24-bit, and 32-bit input data widths • Multi-channel direct raw signal output
• Up to 192kHz sample rate
• Built-in FFT unit supports 512-point FFT of audio data
•Uses system DMAC to store output data in system memory
|Static Random-Access Memory (SRAM)||The SRAM is split into two parts, 6MiB of on-chip
general-purpose SRAM memory and 2MiB of on-chip AI SRAM memory, for a total of 8MiB
|Field Programmable IO Array (FPIOA/IOMUX)||FPIOA allows users to map 255 internal functions to 48
free IOs on the chip
|Digital Video Port (DVP)||Maximum frame size 640x480|
|FFT Accelerator||The FFT accelerator is a hardware implementation of the
Fast Fourier Transform (FFT)
|FreeRtos & Standard SDK||Support FreeRtos and Standrad development kit.|
|MicroPython Support||Support MicroPython on M1|
|Machine vision||Machine vision based on convolutional neural network|
|Machine hearing||High performance microphone array processor|
|Supply voltage of external power supply||4.8V ~ 5.2V|
|Supply current of external power supply||>600mA|
|Range of working temperature||-30℃ ~ 85℃|
|MCU : ESP8285||Tensilica L106 32-bit MCU|
|Wireless Standard||802.11 b/g/n|
|Frequency Range||2400Mhz - 2483.5Mhz|
|TX Power(Conduction test)||802.11.b : +15dBm
802.11.g : +10dBm(54Mbps)
802.11.n : +10dBm (65Mbps)
|Antenna Connector||IPEX 3.0x3.0mm|
|Dimensions||25mm x25mm x1mm|
- MaixPy Introduction
- Getting Started
- MaixPy Release
- MaixPy Model
- Libraries - Maix
- Libraries - Machine vision
- MicroPython Introduction
- Difference between MicroPython & CPython
- MAIX-I&MAIX-I W.DXF
- MAIX-I&MAIX-I W.PcbLib
- MAIX-I&MAIX-I W.SchLib
- MAIX-I&MAIX-I W.olb
- MAIX-I W Assembly drawing
- MAIX-I W Schematic
- Telegram group
- FAE support email: firstname.lastname@example.org
- Kendryte K210 FreeRTOS SDK V0.5.0
- Kendryte K210 Standalone SDK V0.5.2
- Kendryte K210 datasheet English ver.V0.1.5
- Kendryte Standalone SDK Programming Guide-EN-V0.3.0
- Kendryte FreeRTOS SDK Programming Guide-EN-V0.1.0
- Kendryte OpenOCD for win32 V0.1.3
- Kendryte OpenOCD for Ubuntu x86_64 V0.1.3
- RISC-V 64bit toolchain for Kendryte K210_win32 V8.2.0
- RISC-V 64bit toolchain for Kendryte K210_ubuntu_amd64 V8.2.0
- K-Flash V0.3.0
- Kendryte K210 Model Download Guide V0.1.0
- Kendryte K210 Face Detection Demo V0.1.0
- Cmake installation
- Windows CPP Build tools
- Sipeed M1 schematic